Analog Devices Inc. AD4081 20-Bit 20MSPS Differential SAR ADC
Analog Devices AD4081 20-Bit 20MSPS Differential SAR Analog-to-Digital Converter (ADC) is a high-speed, low-noise, low-distortion, Easy Drive, successive approximation register (SAR) ADC. Maintaining a high performance [signal-to-noise and distortion (SINAD) ratio > 90dBFS] at signal frequencies in excess of 1MHz enables the AD4081 to service a wide variety of precision, wide bandwidth data acquisition applications. Simplification of the input anti-alias filter design can be achieved by applying oversampling along with integrated digital filtering and decimation to lower the output data rate and reduce noise, particularly for applications that do not require the lowest latency of the AD4081.
The AD4081 Easy Drive features reduce both signal chain complexity and power consumption while enabling greater flexibility and channel density in companion component selection. The product input structure was designed to minimize any input-dependent signal currents, therefore reducing any converter-induced settling artifacts. The continuous acquisition architecture allows settling across the entire conversion cycle, easing ADC driver settling and bandwidth requirements as compared to other high-speed data converters.
The Analog Devices AD4081 includes several elements that simplify data converter integration: a low-drift reference buffer, low-dropout (LDO) regulators to generate ADC core and digital interface supply rails, and a 16K result data first-in first-out (FIFO) that can significantly reduce the load on the digital host. Additionally, critical reference decoupling and supply capacitors are integrated in the package to simplify printed circuit board (PCB) layout, ensure optimum performance, and reduce the overall solution footprint.
Features
- High performance
- 20MSPS, 77.5ns conversion latency throughput
- ±4ppm (typ.), ±8ppm (max.) INL
- 94.6dBFS dynamic range
- SNR/THD
- 94dB (typ.)/-117.3dB (typ.) at fIN = 1kHz
- 93.7dB (typ.)/-103.7dB (typ.) at fIN = 1MHz
- -164.6dBFS/Hz noise spectral density
- 20-bit resolution, no missing codes
- Low power with 68.6mW (typ.) at 20MSPS with -0.5dBFS sine-wave input
- Easy drive, fully differential input
- 6Vp-p differential input range
- Continuous signal acquisition
- Linearized, 5μA/MSPS input current
- Integrated, low-drift reference buffer and decoupling
- Integrated VCM generation
- Digital features and data interface
- Conversion result FIFO, 16K sample depth
- Digital averaging filter with up to 210 decimation
- SPI configuration
- Configurable data interface
- Single lane, DDR, serial LVDS, 400Mbps per lane
- Dual lane, DDR, serial LVDS, 200Mbps per lane
- Single/quad lane SPI data interface
- Package
- 49-ball, 5mm × 5mm CSP_BGA, 0.65mm pitch
- Integrated supply decoupling capacitors
- -40°C to +85°C operating temperature range
Applications
- Digital imaging
- Cell analysis
- Spectroscopy
- Automated test equipment
- High-speed data acquisition
- Digital control loops, hardware in the loop
- Power quality analysis
- Source measurement units
- Electron and X-ray microscopy
- Radar level measurement
- Nondestructive test
Functional Block Diagram
