STMicroelectronics SR6Px Stellar P Motion Control Microcontrollers

STMicroelectronics SR6Px Stellar P Motion Control Microcontrollers are Stellar-integrated MCUs designed to meet the requirements of domain controllers and ECUs with high integration requested in the architectures of connected, updateable, automated, and electrified cars. The MCUs offer superior real-time and safe performance with high ASIL-D capability. HW-based virtualization technology eases the development and integration of multiple source SW onto the same HW whilemaximizing the resulting SW performance. SR6Px components offer high-efficiency OTA reprogramming capability with fast image download and activation at almost no memory overhead. This is thanks to the unique built-in SR6 dual image storage tailored to OTA reprogramming needs that provides high-speed security cryptographic services, for instance, network authentication.

Features

  • AEC-Q100 automotive qualification pending
  • Superior safe real-time performance at low power
  • Hardware-enabled software isolation/virtualization
  • EVITA Full HSM enhanced with high-speed cryptographic services and safe network authentication
  • Advanced timers (including GTM4) with fast analog capability and embedded advanced signal processing, dedicated sensor/actuator interfaces, and high-temperature support (junction temperature of up to +165°C)
  • Best-in-class over-the-air update
  • State-of-the-art safety measures for efficient ISO 26262 ASIL-D implementation
  • High-bandwidth Ethernet options and high-performance CAN XL protocol (on Stellar P6) to ensure low-latency high-safety communication among domains and in the peripheral actuation ECUs of the vehicle
  • 28nm FD-SOI technology delivers quasi-immunity to radiations

Applications

  • Centralized motion control (e-Mobility, chassis/safety, and PWT)
  • e-Drivetrain integration
  • Inverters
  • Battery management
  • Secure/safe ADAS companion
  • Powertrain for ICE integration

Specifications

  • Cores
    • 32-bit Arm® v8-R compliant CPU cores
      • 6x Cortex®‑R52+ cores (4x with checker cores, 2x split-lock configuration) allowing usage as either 6x cores (4x in lockstep configuration) or 5x cores (all in lockstep configuration), single precision FPU, privilege level for real-time virtualization
      • 2x NEON extensions (for example, SIMD, dual precision FPU)
    • 2x Cortex®‑M4 multipurpose accelerators [data move and (pre)-processing], 1x in lockstep configuration
    • 4x eDMA engines in lockstep configuration
  • Memory
    • 640KB data NVM (512KB + 128KB dedicated to HSM)
    • SR6 P6
      • Up to 16MB on-chip NVM non-volatile memory
      • Up to 2304KB on-chip general-purpose SRAM
    • SR6 P7
      • Up to 20MB on-chip NVM non-volatile memory
      • Up to 8400KB on-chip general-purpose SRAM
  • 2nd generation hardware security module
    • On-chip high-performance security module with EVITA full support
    • Symmetric and asymmetric cryptography processor
    • High-performance lock-stepped AES-light security sub-system for fast ASIL-D cryptographic services
  • ASIL-D safety
    • State-of-the-art safety measures at all levels of the architecture for efficient implementation of ISO26262 ASIL-D functionalities
    • Complete HW virtualization architecture built on Cortex®‑R52+ privilege mode (best-in-class SW isolation, real-time support for multiple virtual machines/applications)
  • 2x OctoSPI to support HyperBus™ memory (Flash/RAM) devices
  • Peripheral, IOs, and communication interfaces
    • 11x LINFlexD modules
    • 2x dual-channel FlexRay controllers
    • 10x queued serial peripheral interface (SPIQ) modules
    • 4x microsecond channels (MSC) and 2x microsecond plus (MSC-Plus) channels
    • 2x SENT modules (15 channels each)
    • 2x PSI5 modules
      • 1x channel each for SR6 P6
      • 2x channels each for SR6 P7
    • Enhanced analog-to-digital converter system
      • 12x separate 12-bit SAR analog converters (including one supervisor/safety ADC)
      • 4x separate 9-bit SAR analog converters (2x channels each) with fast comparator mode
      • 12x separate 16-bit sigma-delta analog converters with embedded DSP processor on each SD ADC
      • Enhanced interconnection with GTM timer for autonomous ADC/GTM subsystem operation
    • Advanced timed I/O capability
      • Generic timer module
        • GTM4144 for SR6 P6
        • GTM4154 for SR6 P7
      • High-resolution timer (SR6 P7 only)
    • Communication interfaces
      • 11x modular controller area network (MCAN) modules, and 1x time-triggered controller area network (M-TTCAN), all supporting flexible data rates (ISO CAN-FD)
      • 2x CAN-XL interfaces
      • 1x ethernet controller 10/100/1000 Mbps, compliant IEEE 802.3-2008: IPv4 and IPv6 checksum modules, AVB, and VLAN for SR6 P6
      • 2x ethernet controllers 10/100/1000 Mbps, compliant IEEE 802.3-2008: IPv4 and IPv6 checksum modules, AVB, VLAN, and EMC optimized SGM for SR6 P7
Đã phát hành: 2022-09-07 | Đã cập nhật: 2026-02-13