ISSI Mobile LPDDR2 SDRAM
ISSI Mobile LPDDR2 SDRAMs achieve high-speed operation using a double data rate architecture. The Mobile LPDDR2 SDRAM double data rate architecture is a pre-fetch architecture with an interface designed to transfer two data words per clock cycle at the I/O pins. The ISSI Mobile LPDDR2 data paths are internally pipelined and 4n bits pre-fetched to achieve very high bandwidth.
Features include a clock frequency range of 10MHz to 533MHz and four to eight internal banks for concurrent operation. The device provides fully synchronous operations referenced to both rising and falling edges of the clock. Two packages are available: 134-ball BGA for x16/x32 and 168-ball PoP BGA for x32.
Features
- Low-voltage core and I/O power supplies
- VDD2 = 1.14V to 1.30V, VDDCA/VDDQ = 1.14V to 1.30V, VDD1 = 1.70V to 1.95V
- High-speed Un-terminated Logic (HSUL_12) I/O Interface
- Clock frequency range: 10MHz to 533MHz (data rate range: 20Mbps to 1066Mbps per I/O)
- Four-bit Pre-fetch DDR architecture
- Multiplexed, double data rate, command/address inputs
- Four to eight internal banks for concurrent operation
- Bidirectional/differential data strobe per byte of data (DQS/DQS#)
- Programmable Read/Write latencies (RL/WL) and burst lengths (4, 8, or 16)
- On-chip temperature sensor to control self-refresh rate
- ZQ calibration
- Partial–array self-refresh (PASR)
- Deep power-down mode (DPD)
- Configurations
- 128Mx16 (16M x 16 x 8 banks)
- 64Mx16 (8M x 16 x 8 banks)
- 64Mx32 (8M x 32 x 8 banks)
- 32Mx32 (4M x 32 x 8 banks)
- 32Mx16 (8M x 16 x 4 banks)
- 16Mx32 (4M x 32 x 4 banks)
- Temperature Grades
- 0°C to +85°C Commercial
- -40°C to +85°C Industrial
- -40°C to +85°C Automotive, A1
- -40°C to +105°C Automotive, A2
- Packages
- 134-ball BGA for x16/x32
- 168-ball PoP BGA for x32
Related Products
ISSI LPDDR4 & LPDDR4X Mobile SDRAM
Low-voltage memory devices, available in 2Gb, 4Gb, and 8Gb densities, ideal for mobile applications.
ISSI Mobile LPDDR2 SDRAM
High-speed operation, using a double data rate architecture, a prefetch architecture.
ISSI DDR SDRAM
Internally organized memory array with four banks of 128Mb to allow concurrent operations.
ISSI DDR2 SDRAM
Uses a double-data-rate architecture to achieve high-speed operation.
Functional Block Diagram
