Microchip Technology PIC16F18154/55/74/75 Full-Featured MCUs
Microchip Technology PIC16F18154/55/74/75 Full-Featured Microcontrollers (MCUs) are well suited for low-cost, energy-efficient analog sensor applications with high-resolution requirements. The PIC16F18154/55/74/75 MCUs offer a suite of analog peripherals that enable precision sensor applications. These devices feature a memory range of 7KB to 28KB with speeds up to 32MHz in small form-factor 8- to 44-pin packages. The MCUs include a 12-bit differential Analog-to-Digital Converter with Computation (ADCC), two 8-bit Digital-to-Analog Converters (DACs), a 16-bit Pulse-Width Modulation (PWM) peripheral, and many more waveform control and communication peripherals.Features
- Compiler-optimized RISC architecture
- Operating speeds
- DC to 32MHz clock input
- 125ns minimum instruction time
- 16-level deep hardware stack
- Low-Current Power-on Reset (POR)
- Configurable Power-up Timer (PWRT)
- Brown-out Reset (BOR)
- Low-Power Brown-out Reset (LPBOR)
- Windowed Watchdog Timer (WWDT)
- Memory
- Up to 28KB of program Flash memory
- Up to 2KB of data SRAM memory
- Up to 256 Bytes of data EEPROM memory
- Memory Access Partition (MAP) with program Flash memory partitioned into:
- Application block
- Boot block
- Storage Area Flash (SAF) block
- Programmable code protection and write protection
- Device Information Area (DIA) stores
- Temperature indicator calibration coefficients
- Fixed Voltage Reference (FVR) measurement data
- Microchip Unique Identifier (MUI)
- Device Characteristics Area (DCI) stores
- Program/erase row sizes
- Pin count details
- Direct, indirect, and relative addressing modes
- Operating characteristics
- 1.8V to 5.5V operating voltage range
- Temperature ranges
- -40°C to +85°C industrial range
- -40°C to +125°C extended range
- Power-saving functionalities
- In Doze, the CPU and peripherals run at different cycle rates (typically CPU is lower)
- In Idle, the CPU halts while peripherals operate
- Sleep
- Lowest power consumption
- Reduce system electrical noise while performing ADC conversions
- Peripheral Module Disable (PMD) selectively minimizes the active power consumption of unused peripherals
- Low power mode
- <900nA (WDT enabled) and <600nA (WDT disabled) typical sleep current at 3V/+25°C
- 48µA typical operating current at 32kHz, 3V/+25°C; <1mA typical at 4MHz, 5V/+25°C
- Clocking structure
- High-Precision Internal Oscillator Block (HFINTOSC)
- Selectable frequencies up to 32MHz
- ±2% at calibration
- Active clock tuning of HFINTOSC for improved accuracy
- Internal 31kHz oscillator (LFINTOSC)
- External 32kHz Secondary Oscillator (SOSC)
- External high-frequency clock input
- 2x crystal/resonator modes
- 2x External Clock (EC) power modes
- 4x PLL available for external sources
- Fail-safe clock monitor allows for operational recovery if the external clock source stops
- Oscillator Start-up Timer (OST) ensures the stability of crystal oscillator sources
- High-Precision Internal Oscillator Block (HFINTOSC)
- Programming/debug
- In-Circuit Serial Programming™ (ICSP™) via 2x pins
- In-Circuit Debug (ICD) with 3x breakpoints via 2x pins
- Debug integrated on-chip
- Digital peripherals
- 2x Capture/Compare/PWM (CCP) modules
- 16-bit resolution for Capture/Compare modes
- 10-bit resolution for PWM mode
- Up to 4x Pulse-Width Modulators (PWM)
- 16-bit resolution
- Independent pulse outputs
- External Reset Signal (ERS) inputs
- 4x Configurable Logic Cells (CLC) with integrated combinational and sequential logic
- 1x Complimentary Waveform Generator (CWG)
- Rising and falling edge dead-band control
- Full-bridge, half-bridge, 1-channel drive
- Multiple signal sources
- Programmable dead band
- Fault-shutdown input
- 1x configurable 8/16-Bit timer (TMR0)
- 2x 16-bit timers (TMR1/3) with gate control
- Up to 3x 8-bit timers (TMR2/4/6) with Hardware Limit Timer (HLT)
- 1x Numerically Controlled Oscillator (NCO)
- Generates true linear frequency control and increased frequency resolution
- Input clock up to 64MHz
- Programmable CRC with memory scan
- Reliable data/program memory monitoring for Fail-Safe operation (e.g., Class B)
- Calculate 32-bit CRC over any portion of program Flash memory
- 2x Enhanced Universal Synchronous Asynchronous Receiver Transmitters (EUSART)
- RS-232, RS-485, LIN compatible
- Auto-wake-up on start
- 2x Host Synchronous Serial Ports (MSSPs)
- Serial Peripheral Interface (SPI) mode with chip select synchronization
- Inter-Integrated Circuit (I2C) mode with 7/10-bit addressing modes
- Peripheral Pin Select (PPS) enables pin mapping of the digital I/O
- Device I/O port
- Up to 35x I/O pins
- 1x input-only pin
- Individual I/O direction, open drain, input threshold, slew rate, and weak pull-up control
- Interrupt-on-Change (IOC) on up to 25x pins
- 1x external interrupt pin
- 2x Capture/Compare/PWM (CCP) modules
- Analog peripherals
- Differential Analog-to-Digital Converter with Computation (ADCC)
- 12-bit resolution
- Up to 35x external positive input channels
- Up to 17x external negative input channels
- 7x internal input channels
- Internal ADC oscillator (ADCRC)
- Operates in sleep
- Selectable Auto-Conversion Trigger (ACT) sources
- 2x 8-bit Digital-to-Analog Converters (DACs)
- Output available on up to 2x I/O pins
- Internal connections to ADC and comparators
- 2x Comparators (CMPs)
- Up to 4x external inputs
- Configurable output polarity
- External output via peripheral pin select
- Zero-Cross Detect (ZCD) detects when the AC signal on the pin crosses the ground
- 2x Fixed Voltage References (FVRs)
- Selectable 1.024V, 2.048V, and 4.096V output levels
- FVR1 internally connected to ADC
- FVR2 internally connected to the comparator
- Differential Analog-to-Digital Converter with Computation (ADCC)
Block Diagram
Core Data Path Diagram
Đã phát hành: 2023-09-08
| Đã cập nhật: 2023-11-28
