Texas Instruments MSPM0G352x-Q1 Mixed-Signal Microcontrollers
Texas Instruments MSPM0G352x-Q1 Mixed-Signal Microcontrollers (MCUs) are part of the MSP highly integrated, ultra-low-power 32-bit MCU family. This family is based on the enhanced Arm® Cortex®-M0+ 32-bit core platform, operating at a frequency of up to 80MHz. These MCUs offer a blend of cost optimization and design flexibility for applications requiring 256KB to 512KB of flash memory in small packages or high-pin-count packages (up to 100 pins). These devices include dual CAN-FD controllers, cybersecurity enablers, and high-performance integrated analog, providing excellent low-power performance across the operating temperature range.
The Texas Instruments MSPM0G352x-Q1 has up to 512KB of embedded Flash program memory with built-in error correction code (ECC) and up to 128KB SRAM (with ECC and parity protection for the first 64kB). The Flash memory is organized into two main banks to support field firmware updates, with address swap support provided between the two main banks.
Flexible cybersecurity enablers can be utilized to support secure boot, secure in-field firmware updates, IP protection (execute-only memory), key storage, and other security features. Hardware acceleration is provided for a variety of AES symmetric cipher modes, as well as a TRNG entropy source. The cybersecurity architecture is pending Arm PSA Level 1 certification.
A set of high-performance analog modules is provided, including two simultaneously sampling 12-bit, 4Msps ADCs that support up to 27 external channels, an on-chip voltage reference (1.4V or 2.5V), one 12-bit 1Msps DAC, and three comparators operable in low-power and high-speed modes with additional built-in 8-bit reference DACs.
Features
- Core is an Arm 32-bit Cortex M0+ CPU with a memory protection unit, and a frequency up to 80MHz
- Functional Safety-Compliant targeted
- Developed for functional safety applications
- Documentation to aid ISO 26262 system design will be available
- Systematic capability up to ASIL B targeted
- PSA-L1 Certification targeted
- Operating characteristics
- Extended temperature: –40°C up to 125°C
- Wide supply voltage range: 1.62V to 3.6V
- Memories
- Up to 512KB of Flash memory with error correction code (ECC)
- Dual-bank with address swap for OTA updates
- 16KB data Flash bank with ECC protection
- 128KB total SRAM
- SRAM (Bank 0): 64kB SRAM with ECC protection or hardware parity, and retention down to STANDBY mode
- SRAM (Bank 1): 64kB SRAM with retention down to STOP mode
- Up to 512KB of Flash memory with error correction code (ECC)
- High-performance analog peripherals
- Two simultaneous sampling 12-bit 4Msps analog-to-digital converters (ADC) with up to 27 external channels
- 14-bit effective resolution at 250ksps with hardware averaging
- Three high-speed comparators (COMP) with integrated 8-bit reference DACs
- 32ns propagation delay in high-speed mode
- Support low-power mode operation down to < 1µA
- One 12-bit 1Msps digital-to-analog converter (DAC) with integrated output buffer
- Programmable analog connections between ADC, COMP, and DAC
- Configurable 1.4V or 2.5V internal shared voltage reference (VREF)
- Integrated temperature sensor
- Two simultaneous sampling 12-bit 4Msps analog-to-digital converters (ADC) with up to 27 external channels
- Optimized low-power modes
- RUN: 123µA/MHz (CoreMark)
- SLEEP: 38µA/MHz
- STOP: 223µA at 4MHz
- STANDBY: 1.7µA at 32kHz with RTC and SRAM Bank 0 and state retention
- SHUTDOWN: 92nA with IO wakeup capability
- Intelligent digital peripherals
- 12-channel DMA controller
- Math accelerator supports DIV, SQRT, MAC, and TRIG computations
- Nine timers support up to 28 PWM channels
- Two 16-bit general-purpose timers support QEI
- Four 16-bit general-purpose timers support low-power operation in STANDBY mode
- One 32-bit general-purpose timer
- Two 16-bit advanced timers with deadband support and complementary outputs up to 12 PWM channels
- Two windowed watchdog timers (WWDT), one independent watchdog timer (IWDT)
- RTC with alarm and calendar mode
- Enhanced communication interfaces
- Seven UART interfaces
- Two supporting LIN, IrDA, DALI, Smart Card, Manchester
- Three supporting low-power operation in STANDBY mode
- Three I2C interfaces supporting up to FM+ (1Mbit/s), SMBus/PMBus, and wakeup from STOP mode
- Three SPI interfaces, with one supporting up to 32Mbits/s
- Two Controller Area Network (CAN) interfaces support CAN 2.0 A or B and CAN-FD
- Seven UART interfaces
- Clock system
- Internal 4MHz to 32MHz oscillator (SYSOSC) with up to ±1.2% accuracy
- Phase-locked loop (PLL) up to 80MHz
- Internal 32kHz low-frequency oscillator (LFOSC) with ±3% accuracy
- External 4MHz to 48MHz crystal oscillator (HFXT)
- External 32kHz crystal oscillator (LFXT)
- External clock input
- Data integrity and encryption
- AES-128/256 accelerator with support for GCM/GMAC, CCM/CBC-MAC, CBC, CTR
- Secure key storage for up to four AES keys
- Flexible firewalls for protecting code and data
- True random number generator (TRNG)
- Cyclic redundancy checker (CRC-16, CRC-32)
- Flexible I/O features
- Up to 94 GPIOs
- Two 5V-tolerant open-drain IOs
- Three high-drive IOs with 20mA drive strength
- Four high-speed IOs
- Up to 94 GPIOs
- Development support of 2-pin serial wire debug (SWD)
- 64-pin LQFP (PM) (0.5mm pitch) package options
- Family members include the MSPM0G3529-Q1, which has 512KB Flash, 128KB RAM
- Development kits and software
- LP-MSPM0G3519 LaunchPad™ development kit
- MSPM0 Software Development Kit (SDK)
- Automotive qualification of AEC-Q100 Grade 1 (-40°C to 125°C)
Applications
- Automotive body electronics and lighting
- Automotive gateway
- Steering wheel systems
- Automotive motor control
- DC to AC inverters
- Automotive interior lighting
- Door handle modules
- Kick to open modules
- Vehicle occupancy detection
- Seat comfort module
Functional Block Diagram
Development Tool
Texas Instruments LP-MSPM0G3519 LaunchPad™ Development Kit
Easy-to-use evaluation module for the MSPM0G3519 microcontroller (MCU).